Capacitive Single Layer Multi-Touch Panel Having Improved Response Characteristics

ABSTRACT

An apparatus is provided. A substrate and a cover plate are provided. A sensor layer is formed on at least one of the substrate and the cover plate. The sensor layer includes a plurality of row electrodes and a plurality of column electrodes interleaved with the plurality of row electrodes, where each row electrode and each column electrode is formed of a plurality of stair-stepped diamonds. An insulator is also included so as to electrically isolate the plurality of row electrodes and the plurality of column electrodes, where the insulator is substantially transparent to visible spectrum light. The apparatus employs mirror symmetric row sensor routing placement. The routing placement provides reduction of row bonding pads by 50% to enhance manufacturing yield. Rearranging unit cells on the same layout results in a decrease of RC parasitics by 50%.

TECHNICAL FIELD

The invention relates generally to a touch panel and, more particularly, to a capacitive touch panel having an improved response.

BACKGROUND

Turning to FIGS. 1 and 2, an example of a conventional system 100 can be seen. System 100 generally comprises a touch panel 102 and touch panel controller 104. The touch panel 102 has an array of sensors formed by a set of column electrodes (e.g., electrode 103), where each electrode of each column is coupled together by a strip electrode (e.g., strip electrode 107), and a set of row electrodes (e.g., electrode 105), where each electrode of each row is coupled together by a strip electrode (e.g., strip electrode 109). Usually, the column and row electrodes (e.g., electrodes 103 and 105) are formed in two separate layers with a dielectric or insulating layer formed therebetween, and these conductive layers which form the electrodes (e.g., electrodes 105 and 109) are generally transparent to visible spectrum light (e.g., light having a wavelength from about 380 nm to about 750 nm). The strip electrodes for each column (e.g., strip electrode 107) are then coupled to the interface or I/F 106 of the touch panel controller 104 by terminals X-1 to X-N, while the strip electrodes for each row (e.g., strip electrode 109) are coupled to the interface 106 by terminals Y-1 to Y-M. The interface 106 is able to communicate with the control circuit 108. As shown in greater detail in FIG. 2, the interface 106 is generally comprised of a multiplexer or mux 202 and an exciter 204.

In operation, the interface 106 (which is usually controlled by the control circuit 108) selects and excites columns of electrodes (e.g., electrode 103) and “scans through” the rows of row electrodes (e.g., electrode 105) so that a touch position from a touch event can be resolved. As an example, interface 204 can excite two adjacent columns through terminals X-j and X-(j+1) with excitation signals EXCITE[j] and EXCITE[j+1], and interface 106 receives a measurement signal from a row associated with terminal Y-i. When an object (e.g., finger) is in proximity to the touch panel (which is generally considered to be a touch event), there is a change in capacitance due at least in part to the arrangement of electrodes (e.g., electrodes 103 and 105), and the controller 108 is able to resolve the position of the touch event.

Most conventional touch panels (e.g., touch panel 102) do, however, exhibit a non-uniform response characteristic, which is manifested as non-uniform signal strength across the panel. This non-uniformity is generally caused by natural variations in the patterns forming the column and row electrodes (e.g., electrodes 103 and 105). In other words, the electrodes are arranged to have gaps or non-overlapping regions between the electrodes so that, as an object (e.g., finger) traverses the panel (e.g., panel 102) and passes over these non-overlapping regions, the signal strength or measured capacitance changes. Therefore, there is a need for a touch panel having a more uniform response characteristic.

Some examples of other conventional systems are: U.S. Pat. No. 4,237421; U.S. Pat. No. 6,188,391; U.S. Pat. No. 7,714,847; U.S.; U.S. Pat. No. 8,278,571; Patent Pre-Grant Publ. No. 2006/0097991; U.S. Patent Pre-Grant Publ. No. 2009/0091551; U.S. Patent Pre-Grant Publ. No. 2010/0149108; U.S. Patent Pre-Grant Publ. No. 2010/0156810; U.S. Patent Pre-Grant Publ. No. 2010/0321326; U.S. Patent Pre-Grant Publ. No. 2011/0095996; U.S. Patent Pre-Grant Publ. No. 2011/0095997; U.S. Patent Pre-Grant Publ. No. 2011/0102361; U.S. Patent Pre-Grant Publ. No. 2011/0157079; U.S. Patent Pre-Grant Publ. No. 2012/0056664; PCT Publ. No. WO2009046363; and PCT Publ. No. WO2011018594.

SUMMARY

An embodiment of the present invention, accordingly, provides an apparatus comprising: a substrate; a cover plate that is substantially transparent to visible spectrum light; a sensor layer formed on at least one of the substrates and the cover plate, wherein the sensor layer includes: a plurality of row electrodes; a plurality of column electrodes interleaved with the plurality of row electrodes, wherein the intersections of each row electrode and each column electrode are arrayed in a logical array defined to reduce parasitic capacitance and resistance; traces formed in the single layer electrically connected to each of the row and column electrodes; and a board configured for attaching to the substrate, the board including vias and routing that provide an equivalent of electrical crossovers to electrically connect each of the electrodes in a row to one another while providing electrical isolation from row electrodes and traces associate with other rows.

In accordance with the present invention, the conductive layer is formed on the cover plate.

In accordance with the present invention, the conductive layer is formed on the substrate.

In accordance with the present invention, the first and second columns of electrodes are horizontal mirror images of one another, the third and forth columns of electrodes are horizontal mirror images of one another and continuing on with columns n-1 and n being horizontal images of one another to complete the column layout in the array.

In accordance with the present invention, the intersections of each row electrode of the row of electrodes with the first and second columns of electrodes is a vertical mirror image of the row of electrodes that intersect with third and fourth columns of electrodes and continuing on with alternating rows with alternating mirrored pairs of columns of electrodes.

In accordance with the present invention, each of the interleaved pairs of columns and rows is formed of a single conductive trace.

In accordance with the present invention, the single conductive trace is substantially transparent to visible spectrum light.

In accordance with the present invention, an insulator that electrically isolates the plurality of row electrodes and the plurality of column electrodes is substantially transparent to visible spectrum light.

An embodiment of the present invention, accordingly, provides an apparatus comprising: a touch panel having: a substrate; a cover plate that is substantially transparent to visible spectrum light; a sensor layer formed on at least one of the substrates and the cover plate, wherein the sensor layer includes: a plurality of row electrodes; a plurality of column electrodes interleaved with the plurality of row electrodes, wherein the intersections of each row electrode and each column electrode are arrayed in a logical array defined to reduce parasitic capacitance and resistance; and an insulator that electrically isolates the plurality of row electrodes and the plurality of column electrodes, wherein the insulator is substantially transparent to visible spectrum light; traces formed in the single layer electrically connected to each of the row and column electrodes; a board configured for attaching to the substrate, the board including vias and routing that provide an equivalent of electrical crossovers to electrically connect each of the electrodes in a row to one another while providing electrical isolation from row electrodes and traces associate with other rows; an interconnect that is coupled to each row electrode and each column electrode; and a touch panel controller that is coupled to the interconnect.

In accordance with the present invention, the conductive layer is formed on the cover plate.

In accordance with the present invention, the conductive layer is formed on the substrate.

In accordance with the present invention, the first and second columns of electrodes are horizontal mirror images of one another, the third and forth columns of electrodes are horizontal mirror images of one another and continuing on with columns n-1 and n being horizontal images of one another to complete the column layout in the array.

In accordance with the present invention, the intersections of each row electrode of the row of electrodes with the first and second columns of electrodes is a vertical mirror image of the row of electrodes that intersect with third and fourth columns of electrodes and continuing on with alternating rows with alternating mirrored pairs of columns of electrodes.

In accordance with the present invention, each of the interleaved pairs of columns and rows is formed of a single conductive trace.

In accordance with the present invention, the single conductive trace is substantially transparent to visible spectrum light.

In accordance with the present invention, an insulator that electrically isolates the plurality of row electrodes and the plurality of column electrodes is substantially transparent to visible spectrum light.

In accordance with the present invention, the touch panel is coupled to the board.

An embodiment of the present invention, accordingly, provides an apparatus comprising: a touch panel having: a display; a substrate that is secured to the display, wherein the substrate is substantially transparent to visible spectrum light; a sensor layer formed over the substrate, wherein the sensor layer includes: a plurality of row electrodes formed over the substrate; a plurality of column electrodes formed over the substrate, wherein each column electrode is interleaved with the plurality of row electrodes, wherein the intersections of each row electrode and each column electrode are arrayed in a logical array defined to reduce parasitic capacitance and resistance; and a first insulator that is formed over the substrate and the sensor layer, wherein the first insulator is substantially transparent to visible spectrum light, and wherein the first insulator electrically isolates the plurality of row electrodes and the plurality of column electrodes; a cover plate that is secured to the first insulator layer, wherein the cover plate is substantially transparent to visible spectrum light; an interconnect that is coupled to each column electrode and each row electrode; and a touch panel controller having: an interface that is coupled to the interconnect; and a control circuit that is coupled to the interface.

In accordance with the present invention, each the plurality of row electrodes and column electrodes is formed of a conductive trace.

In accordance with the present invention, the plurality of row electrodes, the plurality of column electrodes, and the plurality of bridge conductors are formed of indium tin oxide (ITO).

BRIEF DESCRIPTION OF THE DRAWINGS

For a more complete understanding of the present invention, and the advantages thereof, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which:

FIGS. 1 and 2 are diagrams of an example of a conventional system;

FIG. 3 is diagrams of an example of a system in accordance with the present invention;

FIG. 4 is an example of a conventional single layer portion of a touch panel of FIG. 3;

FIG. 5 is an example of layout of optimized to reduce the number of row bonding pads;

FIG. 6 is a physical layout of a portion of a touch panel in accordance with the present invention; and

FIG. 7 depicts an example an actual layout of a 6 row by 4 column touchpad.

DETAILED DESCRIPTION

Refer now to the drawings wherein depicted elements are, for the sake of clarity, not necessarily shown to scale and wherein like or similar elements are designated by the same reference numeral through the several views.

Turning to FIG. 3, an example of a system 200 in accordance with the present invention can be seen. System 200 is similar in construction to system 100 except that touch panel 102 has been replaced by touch panel 202. Additionally, interconnect 204 has been provided to provide communication channels between the touch panel controller 104 and the touch panel 202.

In FIG. 4, a 4 row by 2 column portion of conventional single layer touch panel can be seen. As shown in this example, the touch panel is generally comprised of a touch sensor disposed over or positioned over a display (which can, for example be a liquid crystal display or LCD) so as to allow the light from the display to project through the sensor. This means that each trace of the layer sensor is substantially transparent to visible spectrum light. As shown, the touch sensor is a single layer sensor, having rows R1, R2, R3 and R4 and columns C1 and C2. The column and row traces, in this example, each have a conductive layer disposed on a substrate. Typically, the substrate is formed of glass (which is substantially transparent to visible spectrum light), and the conductive layer is usually formed of a conductive material that is generally transparent to visible spectrum light (such as indium tin oxide, aluminum doped zinc oxide, gallium doped zinc oxide, or indium doped zinc oxide). The conductive layer is usually formed by electron beam evaporation, physical vapor deposition (PVD), or sputter deposition on the substrate, which can, for example, then be patterned using laser ablation or etching so to form the detection electrodes. The sensor layers can then be secured to the cover plate, using an insulating or dielectric material (which can be an adhesive, like epoxy).

In order to achieve a more uniform response characteristic for the touch sensor, the patterns for the conductors should be modified. As shown in the example of FIGS. 5 and 6, row and column traces are interleaved across the touch sensor. The interleaving can vary in configuration based on the logical arrangement of the conductors but are intended to reduce the size, parasitic resistance and capacitance (and, thus, the impact) of the array and produce a generally uniform response characteristic across the touch sensor.

In FIGS. 6 and 7, examples of configurations for the row and column logical arrangements are shown. In FIG. 6, the far and end rows have been shuffled to reduce RC loading. The shuffling is de-shuffled in digital processing in the control circuit 108 of the touch panel controller 104. In this example, electrode of row R1 associated with column C1 and column C2 has the longest routing trace which can be 30 kilohms or higher. Parasitic fringing capacitance of row R1 resulted from coupling with its neighbor hood rows are also the largest of all. However, both R and C come down to minimum for logical row R1′ associated with column C3 and column C4. Following the same arrangement row R2 in column C1 and column C2 is shuffled from the high RC scenario down to low RC scenario in column C3 and column C4. By placing the columns in a mirror symmetric manner as shown in FIG. 6, the bonding pads on the rows are reduced by 50%. FIG. 7 shows and exemplary layout of a 6 row by 4 column touch pad as disclosed in this invention.

As a result of using the configurations shown in FIGS. 6 and 7, several advantages can be realized. One advantage is that the touch panel has a more uniform response characteristic because of the reduction in parasitic capacitance and resistance (the worst case RC is reduced by 50%). Also, because the touch panel in the present invention is a true single metal configuration, where bonding failure is a major manufactureing bottleneck, yield due to reduced bonding pad count is enhanced and thus processing cost is reduced.

Having thus described the present invention by reference to certain of its preferred embodiments, it is noted that the embodiments disclosed are illustrative rather than limiting in nature and that a wide range of variations, modifications, changes, and substitutions are contemplated in the foregoing disclosure and, in some instances, some features of the present invention may be employed without a corresponding use of the other features. Accordingly, it is appropriate that the appended claims be construed broadly and in a manner consistent with the scope of the invention. 

1. An apparatus comprising: a substrate; a cover plate that is substantially transparent to visible spectrum light; a sensor layer formed on at least one of the substrates and the cover plate, wherein the sensor layer includes: a plurality of row electrodes; a plurality of column electrodes interleaved with the plurality of row electrodes, wherein the intersections of each row electrode and each column electrode are arrayed in a logical array defined to reduce parasitic capacitance and resistance; traces formed in the single layer electrically connected to each of the row and column electrodes; and a board configured for attaching to the substrate, the board including vias and routing that provide an equivalent of electrical crossovers to electrically connect each of the electrodes in a row to one another while providing electrical isolation from row electrodes and traces associate with other rows.
 2. The apparatus of claim 1, wherein the conductive layer is formed on the cover plate.
 3. The apparatus of claim 1, wherein the conductive layer is formed on the substrate.
 4. The apparatus of claim 1, wherein the first and second columns of electrodes are horizontal mirror images of one another, the third and forth columns of electrodes are horizontal mirror images of one another and continuing on with columns n-1 and n being horizontal images of one another to complete the column layout in the array.
 5. The apparatus of claim 1, wherein the intersections of each row electrode of the row of electrodes with the first and second columns of electrodes is a vertical mirror image of the row of electrodes that intersect with third and fourth columns of electrodes and continuing on with alternating rows with alternating mirrored pairs of columns of electrodes.
 6. The apparatus of claim 1, wherein each of the interleaved pairs of columns and rows is formed of a single conductive trace.
 7. The apparatus of claim 1, wherein the single conductive trace is substantially transparent to visible spectrum light.
 8. The apparatus of claim 1, wherein an insulator that electrically isolates the plurality of row electrodes and the plurality of column electrodes is substantially transparent to visible spectrum light.
 9. The apparatus of claim 1, wherein a touch panel controller is coupled to the board.
 10. An apparatus comprising: a touch panel having: a substrate; a cover plate that is substantially transparent to visible spectrum light; a sensor layer formed on at least one of the substrates and the cover plate, wherein the sensor layer includes: a plurality of row electrodes; a plurality of column electrodes interleaved with the plurality of row electrodes, wherein the intersections of each row electrode and each column electrode are arrayed in a logical array defined to reduce parasitic capacitance and resistance; and an insulator that electrically isolates the plurality of row electrodes and the plurality of column electrodes, wherein the insulator is substantially transparent to visible spectrum light; traces formed in the single layer electrically connected to each of the row and column electrodes; a board configured for attaching to the substrate, the board including vias and routing that provide an equivalent of electrical crossovers to electrically connect each of the electrodes in a row to one another while providing electrical isolation from row electrodes and traces associate with other rows; an interconnect that is coupled to each row electrode and each column electrode; and a touch panel controller that is coupled to the interconnect.
 11. The apparatus of claim 10, wherein the conductive layer is formed on the cover plate.
 12. The apparatus of claim 10, wherein the conductive layer is formed on the substrate.
 13. The apparatus of claim 10, wherein the first and second columns of electrodes are horizontal mirror images of one another, the third and forth columns of electrodes are horizontal mirror images of one another and continuing on with columns n-1 and n being horizontal images of one another to complete the column layout in the array.
 14. The apparatus of claim 10, wherein the intersections of each row electrode of the row of electrodes with the first and second columns of electrodes is a vertical mirror image of the row of electrodes that intersect with third and fourth columns of electrodes and continuing on with alternating rows with alternating mirrored pairs of columns of electrodes.
 15. The apparatus of claim 10, wherein each of the interleaved pairs of columns and rows is formed of a single conductive trace.
 16. The apparatus of claim 10, wherein the single conductive trace is substantially transparent to visible spectrum light.
 17. The apparatus of claim 10, wherein an insulator that electrically isolates the plurality of row electrodes and the plurality of column electrodes is substantially transparent to visible spectrum light.
 18. The apparatus of claim 10, wherein the touch panel is coupled to the board.
 19. An apparatus comprising: a touch panel having: a display; a substrate that is secured to the display, wherein the substrate is substantially transparent to visible spectrum light; a sensor layer formed over the substrate, wherein the sensor layer includes: a plurality of row electrodes formed over the substrate; a plurality of column electrodes formed over the substrate, wherein each column electrode is interleaved with the plurality of row electrodes, wherein the intersections of each row electrode and each column electrode are arrayed in a logical array defined to reduce parasitic capacitance and resistance; and a first insulator that is formed over the substrate and the sensor layer, wherein the first insulator is substantially transparent to visible spectrum light, and wherein the first insulator electrically isolates the plurality of row electrodes and the plurality of column electrodes; a cover plate that is secured to the first insulator layer, wherein the cover plate is substantially transparent to visible spectrum light; an interconnect that is coupled to each column electrode and each row electrode; and a touch panel controller having: an interface that is coupled to the interconnect; and a control circuit that is coupled to the interface.
 20. The apparatus of claim 19, wherein each the plurality of row electrodes and column electrodes is formed of a conductive trace.
 21. The apparatus of claim 20, wherein the plurality of row electrodes, the plurality of column electrodes, and the plurality of bridge conductors are formed of indium tin oxide (ITO). 